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Title: Tree-permutation-matrix based LDPC codes
Authors: Jiang, S 
Mo, FL 
Lau, FCM 
Sham, CW
Keywords: FPGA implementation
Low-density parity-check code
Tree-permutation matrix
Issue Date: 2018
Publisher: Institute of Electrical and Electronics Engineers
Source: IEEE transactions on circuits and systems. II, Express briefs, Aug. 2018, v. 65, no. 8, p. 1019-1023 How to cite?
Journal: IEEE transactions on circuits and systems. II, Express briefs 
Abstract: Low-density parity-check (LDPC) codes are normally categorized into random structure or regular structure. In this brief, we introduce a new type of LDPC codes which is of semi-regular style. The parity-check matrices of the new LDPC code type are composed of sub-matrices termed tree-permutation matrices (TPMs). These TPMs are "semi-regular" and are constructed in a systematic way. Using the 2 x 2 identity matrix and anti-diagonal matrix as an example, we illustrate how 2(M) x 2(M ) TPMs are formed. During the formation of the 2(M) x 2(M) TPMs, we further apply the hill-climbing algorithm to avoid short cycles. Finally, we construct a girth-8 TPM-LDPC code with a base matrix of size 4 x 24 and a girth-10 TPM-LDPC code with a base matrix of size 3 x 10. We implement the TPM-LDPC decoders on an FPGA and compare the simulation results and decoder complexity with other LDPC codes.
ISSN: 1549-7747
EISSN: 1558-3791
DOI: 10.1109/TCSII.2017.2785779
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