Please use this identifier to cite or link to this item: http://hdl.handle.net/10397/78913
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dc.contributorDepartment of Electronic and Information Engineeringen_US
dc.creatorJiang, Sen_US
dc.creatorMo, FLen_US
dc.creatorLau, FCMen_US
dc.creatorSham, CWen_US
dc.date.accessioned2018-10-26T01:21:38Z-
dc.date.available2018-10-26T01:21:38Z-
dc.identifier.issn1549-7747en_US
dc.identifier.urihttp://hdl.handle.net/10397/78913-
dc.language.isoenen_US
dc.publisherInstitute of Electrical and Electronics Engineersen_US
dc.rights© 2017 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.en_US
dc.rightsThe following publication S. Jiang, F. Mo, F. C. M. Lau and C. Sham, "Tree-Permutation-Matrix Based LDPC Codes," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 65, no. 8, pp. 1019-1023, Aug. 2018 is available at https://dx.doi.org/10.1109/TCSII.2017.2785779en_US
dc.subjectFPGA implementationen_US
dc.subjectLow-density parity-check codeen_US
dc.subjectTree-permutation matrixen_US
dc.titleTree-permutation-matrix based LDPC codesen_US
dc.typeJournal/Magazine Articleen_US
dc.identifier.spage1019en_US
dc.identifier.epage1023en_US
dc.identifier.volume65en_US
dc.identifier.issue8en_US
dc.identifier.doi10.1109/TCSII.2017.2785779en_US
dcterms.abstractLow-density parity-check (LDPC) codes are normally categorized into random structure or regular structure. In this brief, we introduce a new type of LDPC codes which is of semi-regular style. The parity-check matrices of the new LDPC code type are composed of sub-matrices termed tree-permutation matrices (TPMs). These TPMs are "semi-regular" and are constructed in a systematic way. Using the 2 x 2 identity matrix and anti-diagonal matrix as an example, we illustrate how 2(M) x 2(M ) TPMs are formed. During the formation of the 2(M) x 2(M) TPMs, we further apply the hill-climbing algorithm to avoid short cycles. Finally, we construct a girth-8 TPM-LDPC code with a base matrix of size 4 x 24 and a girth-10 TPM-LDPC code with a base matrix of size 3 x 10. We implement the TPM-LDPC decoders on an FPGA and compare the simulation results and decoder complexity with other LDPC codes.en_US
dcterms.accessRightsopen accessen_US
dcterms.bibliographicCitationIEEE transactions on circuits and systems. II, Express briefs, Aug. 2018, v. 65, no. 8, p. 1019-1023en_US
dcterms.isPartOfIEEE transactions on circuits and systems. II, Express briefsen_US
dcterms.issued2018-08-
dc.identifier.isiWOS:000440693200011-
dc.identifier.eissn1558-3791en_US
dc.description.validate201810 bcrcen_US
dc.description.oaAccepted Manuscripten_US
dc.identifier.FolderNumbera0721-n06-
dc.description.fundingSourceRGCen_US
dc.description.fundingTextRGC: 15208815Een_US
dc.description.pubStatusPublisheden_US
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