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Title: A numerical investigation on effects of lateral Si/SiO2 interface traps on magnetic sensitivity of sectorial SD-MAGFET
Authors: Yang, ZY
Leung, CW 
Lai, PT
Pong, PWT
Issue Date: 2016
Source: 2016 5th International Symposium on Next-Generation Electronics (ISNE), Hsinchu, Taiwan, 4-5 May 2016, p. 1-2
Abstract: This work studies the influence of the Si/SiO2 interface traps at the sidewall of sectorial SD-MAGFET in detail. Ionized acceptor traps work like negative oxide charges to enhance the magnetic sensing of the device by depleting the conduction channel, but ionized donor traps behave like positive oxide charges to weaken the magnetic sensing by inducing a parasitic channel at the sidewall. In particular, the higher the density of the acceptor or donor traps, the stronger is the effect on the magnetic sensitivity. Moreover, the trap energy also affects the sensitivity, with larger effect for traps lying closer to the valence or conduction band.
Keywords: Interface traps
Magnetic sensitivity
Sectorial SD-MAGFETs
Si/SiO2 interface
Publisher: IEEE
ISBN: 978-1-5090-2439-1 (Electronic)
DOI: 10.1109/ISNE.2016.7543340
Rights: © 2016 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
The following publication Z. Y. Yang, C. W. Leung, P. T. Lai and P. W. T. Pong, "A numerical investigation on effects of lateral Si/SiO2 interface traps on magnetic sensitivity of sectorial SD-MAGFET," 2016 5th International Symposium on Next-Generation Electronics (ISNE), Hsinchu, Taiwan, 2016, pp. 1-2 is available at https://doi.org/10.1109/ISNE.2016.7543340.
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