Please use this identifier to cite or link to this item: http://hdl.handle.net/10397/249
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dc.contributorDepartment of Electronic and Information Engineering-
dc.creatorChau, LP-
dc.creatorLun, PKD-
dc.creatorSiu, WC-
dc.date.accessioned2014-12-11T08:23:02Z-
dc.date.available2014-12-11T08:23:02Z-
dc.identifier.issn1057-7130-
dc.identifier.urihttp://hdl.handle.net/10397/249-
dc.language.isoenen_US
dc.publisherInstitute of Electrical and Electronics Engineersen_US
dc.rights© 2001 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.en_US
dc.rightsThis material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.en_US
dc.subjectAddress generation techniqueen_US
dc.subjectDiscrete cosine transformen_US
dc.subjectFast algorithmen_US
dc.subjectPrime factor algorithmen_US
dc.titleEfficient prime factor algorithm and address generation techniques for the discrete cosine transformen_US
dc.typeJournal/Magazine Articleen_US
dc.identifier.spage985-
dc.identifier.epage988-
dc.identifier.volume48-
dc.identifier.issue10-
dc.identifier.doi10.1109/82.974787-
dcterms.abstractThis brief proposes an efficient prime factor algorithm for the discrete cosine transform. In the proposal, we formulate the decomposition directly, by using the proposed input and output mapping, a novel in-place address generation scheme for input index mapping is derived, while the formulations in the literature require a table to store the index mapping. Besides, our approach requires one output index mapping only while the conventional algorithms require two index mapping. Hence, by using the proposed mappings and address generation techniques, less temporary storage is required, such that a reduction on memory requirement can be achieved during the implementation. A comparison of the address generation time between our approach and the conventional approach is also shown.-
dcterms.accessRightsopen accessen_US
dcterms.bibliographicCitationIEEE transactions on circuits and systems. II, Analog and digital signal processing, Oct. 2001, v. 48, no. 10, p. 985-988-
dcterms.isPartOfIEEE transactions on circuits and systems. II, Analog and digital signal processing-
dcterms.issued2001-10-
dc.identifier.isiWOS:000173260000014-
dc.identifier.scopus2-s2.0-0035493812-
dc.identifier.rosgroupidr09152-
dc.description.ros2001-2002 > Academic research: refereed > Publication in refereed journal-
dc.description.oaVersion of Recorden_US
dc.identifier.FolderNumberOA_IR/PIRAen_US
dc.description.pubStatusPublisheden_US
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