Please use this identifier to cite or link to this item: http://hdl.handle.net/10397/112536
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dc.contributorDepartment of Applied Physics-
dc.creatorPei, Jen_US
dc.creatorSong, Len_US
dc.creatorLiu, Pen_US
dc.creatorLiu, Sen_US
dc.creatorLiang, Zen_US
dc.creatorWen, Yen_US
dc.creatorLiu, Yen_US
dc.creatorWang, Sen_US
dc.creatorChen, Xen_US
dc.creatorMa, Ten_US
dc.creatorGao, Sen_US
dc.creatorHu, Gen_US
dc.date.accessioned2025-04-16T04:33:56Z-
dc.date.available2025-04-16T04:33:56Z-
dc.identifier.issn0935-9648en_US
dc.identifier.urihttp://hdl.handle.net/10397/112536-
dc.language.isoenen_US
dc.publisherWiley-VCH Verlag GmbH & Co. KGaAen_US
dc.rights© 2024 The Author(s). Advanced Materials published by Wiley-VCH GmbH. This is an open access article under the terms of the Creative Commons Attribution-NonCommercial License (http://creativecommons.org/licenses/by-nc/4.0/), which permits use, distribution and reproduction in any medium, provided the original work is properly cited and is not used for commercial purposes.en_US
dc.rightsThe following publication J. Pei, L. Song, P. Liu, S. Liu, Z. Liang, Y. Wen, Y. Liu, S. Wang, X. Chen, T. Ma, S. Gao, G. Hu, Scalable Synaptic Transistor Memory from Solution-Processed Carbon Nanotubes for High-Speed Neuromorphic Data Processing. Adv. Mater. 2025, 37, 2312783 is available at https://doi.org/10.1002/adma.202312783.en_US
dc.subjectCarbon nanotubesen_US
dc.subjectConvolution kernelen_US
dc.subjectNeuromorphic computingen_US
dc.subjectSynaptic memoryen_US
dc.subjectThin-film transistorsen_US
dc.titleScalable synaptic transistor memory from solution-processed carbon nanotubes for high-speed neuromorphic data processingen_US
dc.typeJournal/Magazine Articleen_US
dc.identifier.volume37en_US
dc.identifier.issue2en_US
dc.identifier.doi10.1002/adma.202312783en_US
dcterms.abstractNeural networks as a core information processing technology in machine learning and artificial intelligence demand substantial computational resources to deal with the extensive multiply-accumulate operations. Neuromorphic computing is an emergent solution to address this problem, allowing the computation performed in memory arrays in parallel with high efficiencies conforming to the neural networks. Here, scalable synaptic transistor memories are developed from solution-sorted carbon nanotubes. The transistors exhibit a large switching ratio of over 105, a significant memory window of ≈12 V arising from charge trapping, and low response delays down to tens of nanoseconds. These device characteristics endow highly stabilized reconfigurable conductance states, successful emulation of synaptic functions, and a high data processing speed. Importantly, the devices exhibit uniform characteristic metrics, e.g., with a 1.8% variation in the memory window, suggesting an industrial-scale manufacturing capability of the fabrication. Using the memories, a hardware convolution kernel is designed and parallel image processing is demonstrated at a speed of 1 M bit per second per input channel. Given the efficacy of the convolution kernel, a promising prospect of the memories in implementing neuromorphic computing is envisaged. To explore the potential, large-scale convolution kernels are simulated and high-speed video processing is realized for autonomous driving.-
dcterms.accessRightsopen accessen_US
dcterms.bibliographicCitationAdvanced materials, 15 Jan. 2025, v. 37, no. 2, 2312783en_US
dcterms.isPartOfAdvanced materialsen_US
dcterms.issued2025-01-15-
dc.identifier.scopus2-s2.0-85207537133-
dc.identifier.eissn1521-4095en_US
dc.identifier.artn2312783en_US
dc.description.validate202504 bcch-
dc.description.oaVersion of Recorden_US
dc.identifier.FolderNumberOA_Scopus/WOS-
dc.description.fundingSourceRGCen_US
dc.description.fundingSourceOthersen_US
dc.description.fundingTextCUHK; SHIAE; PolyU; NSFCen_US
dc.description.pubStatusPublisheden_US
dc.description.oaCategoryCCen_US
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