Please use this identifier to cite or link to this item: http://hdl.handle.net/10397/80608
Title: On a real-time blind signal separation noise reduction system
Authors: Yiu, KFC 
Low, SY
Issue Date: 2018
Publisher: Hindawi Publishing Corporation
Source: International journal of reconfigurable computing, 2018, v. 2018, 3721756 How to cite?
Journal: International journal of reconfigurable computing 
Abstract: Blind signal separation has been studied extensively in order to tackle the cocktail party problem. It explores spatial diversity of the received mixtures of sources by different sensors. By using the kurtosis measure, it is possible to select the source of interest out of a number of separated BSS outputs. Further noise cancellation can be achieved by adding an adaptive noise canceller (ANC) as postprocessing. However, the computation is rather intensive and an online implementation of the overall system is not straightforward. This paper intends to fill the gap by developing an FPGA hardware architecture to implement the system. Subband processing is explored and detailed functional operations are profiled carefully. The final proposed FPGA system is able to handle signals with sample rate over 20000 samples per second.
URI: http://hdl.handle.net/10397/80608
ISSN: 1687-7195
EISSN: 1687-7209
DOI: 10.1155/2018/3721756
Rights: Copyright © 2018 Ka Fai Cedric Yiu and Siow Yong Low. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
The following publication Ka Fai Cedric Yiu and Siow Yong Low, “On a Real-Time Blind Signal Separation Noise Reduction System,” International Journal of Reconfigurable Computing, vol. 2018, Article ID 3721756, 9 pages, 2018 is available at https://doi.org/10.1155/2018/3721756
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