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Title: On the realization of discrete cosine transform using the distributed arithmetic
Authors: Chan, YH 
Siu, WC 
Keywords: CMOS integrated circuits
Digital arithmetic
Digital signal processing chips
Discrete cosine transforms
Special purpose computers
Issue Date: Sep-1992
Publisher: IEEE Circuits and Systems Society
Source: IEEE transactions on circuits and systems. I, Fundamental theory and applications, Sept. 1992, v. 39, no. 9, p. 705-712 How to cite?
Journal: IEEE transactions on circuits and systems. I, Fundamental theory and applications 
Abstract: In this paper, we propose a unified approach for the realization of forward and inverse discrete cosine transforms. By making use of this approach, one can realize an odd prime length DCT/IDCT with two half-length convolutions without extra overheads in terms of the number of multiplications. This formulation is most suitable for the realization using the distributed arithmetic. In such a case, typical convolvers can be used as the core unit for the hardware implementation of the transforms. Hence, an efficient unified DCT/IDCT chip can be designed. A 2-D 11 x 11 unified DCT/IDCT chip is also proposed to demonstrate the superiority of the proposed formulation in this paper. The proposed architecture can easily meet the speed requirement of 14.3-MHz real-time operation with the current 2-μm CMOS technology.
ISSN: 1057-7122
DOI: 10.1109/81.250161
Rights: © 1992 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
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