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Title: Communication mechanism for heterogeneous computer system
Authors: Lau, Wing-chiu
Degree: M.Phil.
Issue Date: 1999
Abstract: Heterogeneous computing system is suitable for image processing because different kinds of processor could be used to handle image processing problems in different levels. Image data can be delivered to the low level processors for number crunching operations. Then the processed data can be delivered to other processing layer to perform recognition and other high level processing tasks. Apparently, the performance of this system is highly depended on its communication mechanism. The heterogeneous system consists of two layers. The first layer consists of a DSP network for low-level processing. While the second layer is a network of workstations, or personal computers. This maps well onto a simplified image processing paradigm with the DSP layer for low-level processing and the network of workstations for non-image based processing. Based on this paradigm, the system resembles a two stage multi-layers architecture. In the pre-processing phase, image data is delivered to the low level processors and operations are handled by using SPMD paradigm. The processed data is delivered to the high level processors where feature extraction and recognition tasks are performed. In order to connect the two layers together, an efficient mechanism must be applied. From our studies, the QuickRing technology which can sustain a high data throughput rate of 160 Mbytes/s, is suitable for our proposed system. We have developed a model for the QuickRing controller chip and studied the performance of the communication network of the proposed heterogeneous image processing system by simulation. The performance of QuickRing in different data transmission modes has been studied and this produces information regarding the feasibility for achieving real-time processing under different transmission modes. To realise the system based on the QuickRing communication controller, hardware components, such as a bridge hop, a DSP Layer Controller have been designed. In addition, a new communication protocol, based on the low level protocol of the QuickRing Network, is developed. In our proposed system, the channel connecting the two layers could become a communication bottleneck and its performance is studied using a software simulator. We found that the communication channel will not affect the system performance.
Subjects: Parallel processing (Electronic computers)
Image processing
Hong Kong Polytechnic University -- Dissertations
Pages: xii, 106 leaves : ill. ; 31 cm
Appears in Collections:Thesis

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