Large-conversion switched-capacitor (SC) based DC-DC power converters

Abstract

The increasing environmental concern on the green house gas generation and the continuous demand on increasing processing power of modern microprocessors have triggered the design of the central processing units toward a lower supply voltage down to the fundamental limit of semiconductor of less than 1 V to decrease power consumption and to increase the processing power by increasing the level of integration on semiconductors. However, the standard supply voltages are usually a multiple of 12 V. The performance of the traditional single-stage buck-based converter for the microprocessor at this large voltage gain (LVG) ratio becomes highly deteriorated. Efforts have been done to reduce the LVG ratio on the buck stage of the buck converter by utilizing the voltage step down characteristic of transformers and coupled inductors. However, transformers and inductors may decrease power density and incur additional loss on the overall buck converter. It has been demonstrated that for LVG power conversion, a two-stage converter can be better than a single-stage converter. The first-stage of the two-stage converter is a switched-capacitor (Se) converter which step down the input voltage to a "comfort" zone voltage of the second-stage traditional buck converter. The power saved by operating the second-stage buck converter at the comfort zone input voltage can be utilized for the first-stage SC converter for the voltage step down function. However, the optimization of this emerging two-stage SC-buck LVG ratio voltage converter is still in its infancy. Therefore, this thesis is intended to provide a systematic development on this LVG SC-buck converter. The existing hybrid series-parallel SC-buck converter is studied in this thesis. The parameters effecting the efficiency of this SC-buck converter are investigated. It is found that the optimization of this SC-buck converter can be done by selecting an appropriate stage number n, which is the number of flying capacitors of the series-parallel SC converter. The optimization of the SC-buck converter is continue by a newly proposed family of exponential SC (ESC) converter for the first stage SC converter, which can achieve LVG ratio with high efficiency and less number of switches. As this new ESC converter is topologic ally different from the previous SC converter, previous analytical calculation methods are found inadequate. An discrete-time analysis method is thus proposed to assist the property exploration of this newly proposed ESC converter. The analyses take into consideration of all practical parasitic circuit elements, including the electrostatic resistance of the capacitors for accurate calculation of the converter efficiency. The design is further optimized from the view of the number of energy flow which provides a high level systematic procedure for obtaining a better efficiency of the converter. All the theoretical findings in this thesis are verified with experimental measurements. The results obtained are used for the development of a design procedure for the LVG ESC power converter. This thesis contains six chapters. The first chapter gives an introduction of the background and the literature review of converters for the LVG application and the type of step-down SC converter. The second chapter introduces the operating principles and provides information on SC converter, buck converter and two-stage converter. The following three chapters report the core results of the investigation of the SC-buck converters. The final chapter concludes this thesis and give some discusses on possible future works.