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Title: Bias stress stability improvement in solution-processed low-voltage organic field-effect transistors using relaxor ferroelectric polymer gate dielectric
Authors: Tang, W
Zhao, JQ
Huang, YK
Ding, L
Li, QF
Li, JH
You, P 
Yan, F
Guo, XJ
Keywords: Organic field-effect transistor(OFET)
Low voltage
Solution processed
Issue Date: 2017
Publisher: Institute of Electrical and Electronics Engineers
Source: IEEE electron device letters, 2017, v. 38, no. 6, p. 748-751 How to cite?
Journal: IEEE electron device letters 
Abstract: Low-voltage organic-field effect transistors (OFETs) using relaxor ferroelectric polymer poly (vinylidene fluoridetrifluoroethylene-chlorofloroethylene) P (VDF-TrFE-CFE)) were fabricated. The measured hysteresis loop and the threshold voltage shift under negative bias stress (NBS) are opposite to that of the reference device using low-k CYTOP gate dielectric layer, in which the hysteresis and NBS-induced instabilities are explained by gate bias-induced charge trapping. The anomalous behaviors in the P (VDF-TrFE-CFE) OFETs are attributed to the stress-induced remnant polarization in P (VDF-TrFE-CFE), which induces additional mobile charges into the channel. By adding a thin CYTOP layer between the P (VDF-TrFE-CFE) layer and the semiconductor layer, the two effects of charge trapping and remnant polarization under gate bias are found to be neutralized with each other, resulting in low-voltage OFETs of negligible hysteresis and excellent NBS stability.
ISSN: 0741-3106
EISSN: 1558-0563
DOI: 10.1109/LED.2017.2696987
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