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Title: Temperature-triggered behavioral IPs HW Trojan detection method with FPGAs
Authors: Li, X
Carrion Schafer, B 
Keywords: VLSI
Field programmable gate arrays
Industrial property
Integrated circuit design
Invasive software
Logic design
Issue Date: 2015
Publisher: Institute of Electrical and Electronics Engineers
Source: Proceedings of the 25th International Conference on Field Programmable Logic and Applications (FPL’2015), London, U.K, 2-4 September 2015, p.1-4 How to cite?
Abstract: This works targets the detection of temperature triggered HW Trojans, in particular for third party behavioral IPs (3PBIPs) given in ANSI-C. One of the biggest advantages of C-Based VLSI design is its ability to automatically generate architectures with different trade-offs by only setting different synthesis options. This work uses this property to detect temperature-triggered HW Trojan. A complete design flow is presented. It comprises two main phases: (1) In the first phase, a design space explorer generates micro-architectures with different area vs. power trade-offs automatically for the given behavioral IP. (2) The second phase, maps three of these micro-architectures with different power profiles onto a reconfigurable computing board to create a 3-way redundant system. This system combined with a majority voter scheme is used to detect if a HW Trojan is present in the behavioral IP. Having different power profiles implies that each micro-architecture has a different thermal behavior and thus will trigger the HW Trojan at different time intervals. The outputs of the three designs are compared for discrepancies at regular intervals, allowing our method to therefore exactly pinpoint the exact trigger temperature of the HW Trojan. A case study is presented showing the effectiveness of our method.
DOI: 10.1109/FPL.2015.7294009
Appears in Collections:Conference Paper

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