Please use this identifier to cite or link to this item:
Title: Efficient and reliable high-level synthesis design space explorer for FPGAs
Authors: Liu, D
Schafer, BC
Issue Date: 2016
Publisher: Institute of Electrical and Electronics Engineers
Source: 2016 26th International Conference on Field-Programmable Logic and Applications (FPL), Aug 29-Aug 2, 2016, Ecole Polytechnique Federale de Lausanne, Lausanne, Switzerland How to cite?
Appears in Collections:Conference Paper

Show full item record

Page view(s)

Last Week
Last month
Citations as of Feb 18, 2019

Google ScholarTM


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.