Please use this identifier to cite or link to this item: http://hdl.handle.net/10397/65962
Title: Durable address translation in PCM-based flash storage systems
Authors: Liu, D
Zhong, K
Wang, T
Wang, Y
Shao, Z 
Sha, E
Xue, J
Keywords: Flash translation layer
NAND flash memory
Phase change memory
Write activity
Issue Date: 2017
Publisher: Institute of Electrical and Electronics Engineers
Source: IEEE transactions on parallel and distributed systems, 2017, v. 28, no. 2, 7501824, p. 475-490 How to cite?
Journal: IEEE transactions on parallel and distributed systems 
Abstract: Phase change memory (PCM) is a promising DRAM alternative because of its non-volatility, high density, low standby power and close-to-DRAM performance. These features make PCM an attractive solution to optimize the management of NAND flash memory in embedded systems. However, PCM's limited write endurance hinders its application in embedded systems. Therefore, how to manage flash memory with PCM - particularly guarantee PCM a reasonable lifetime - becomes a challenging issue. In this paper, we propose to partially replace DRAM using PCM to optimize the management of flash memory metadata for better system reliability in the presence of power failure and system crash. To prolong PCM's lifetime, we present a write-activity-aware PCM-assisted flash memory management scheme, called PCM-FTL. By differentiating sequential and random I/O behaviors, a novel two-level mapping mechanism and a customized wear-leveling scheme are developed to reduce writes to PCM and extend its lifetime. We evaluate PCM-FTL with a variety of general-purpose and mobile I/O workloads. Experimental results show that PCM-FTL can significantly reduce write activities and achieve an even distribution of writes in PCM with very low overhead.
URI: http://hdl.handle.net/10397/65962
ISSN: 1045-9219
EISSN: 1558-2183
DOI: 10.1109/TPDS.2016.2586059
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