Please use this identifier to cite or link to this item: http://hdl.handle.net/10397/50808
Title: An ASIC design of a high-speed clock and data recovery circuit
Authors: Ng, CW
Yu, KH
Sham, CW
Tse, CK 
Issue Date: 2011
Source: Proceedings of the International Conference on Electronics and Information Engineering (ICEIE' 2011), Tianjin, China, September 2011, p. 1-6 How to cite?
URI: http://hdl.handle.net/10397/50808
Appears in Collections:Conference Paper

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