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Title: A 2-D analytical threshold-voltage model for GeOI/GeON MOSFET with high-k gate dielectric
Authors: Ji, F
Xu, JP
Liu, L
Tang, WM 
Lai, PT
Keywords: GeOI/GeON MOSFETs
High-k gate dielectric
Threshold voltage
Issue Date: 2016
Publisher: Pergamon Press
Source: Microelectronics reliability, 2016, v. 57, p. 24-33 How to cite?
Journal: Microelectronics reliability 
Abstract: A 2-D analytical threshold-voltage model for ultra-thin-body MOSFET with buried insulator and high-k gate dielectric is established by solving the 2-D Poisson's equation for the gate-dielectric, channel and buried-insulator regions. The validity of the model is confirmed by comparing with experimental data and other models. Using the model, the influences of gate-dielectric permittivity, buried-insulator permittivity, channel thickness, buried-insulator thickness and channel doping concentration on threshold behaviors are investigated. It is found that the threshold behaviors can be improved by using buried insulator with low permittivity, thin channel and high channel doping concentration. However, the threshold performance would be degraded when high-k gate dielectric is used due to enhanced fringing-field effect.
ISSN: 0026-2714
DOI: 10.1016/j.microrel.2015.12.004
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