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Title: Real-time feedback control mechanism on packet switching network
Authors: Yam, Kam-tai
Keywords: Hong Kong Polytechnic University -- Dissertations
Packet switching (Data transmission)
Real-time control
Feedback control systems
Issue Date: 2003
Publisher: The Hong Kong Polytechnic University
Abstract: This project is a joint research between Motorola (HK) Semiconductor Product Sector Limited Company and the Hong Kong Polytechnic University. In this project, Internet Telephony is studied as an example of real time traffic communication in Internet. In recent years, due to the popularity of Internet and many applications that are associated with it, more emphases are focused on the QoS of delivery to Internet-users. At the beginning of the thesis, background research on packet voice is presented. It includes: (i) Several classic packet voice models. (ii) Real Time Protocol (RTP) and Real Time Control Protocol (RTCP) protocols. (iii) Definition of QoS and traffic management algorithm in Internet communications. The real time communications issue in packet switching network is addressed. This study providing an overview on the current technology on what one should consider in real time packet communications.
Base on above studies, a new traffic control algorithm, namely the Real Time Feedback Control Mechanism (RFCM) is developed for Internet real time traffic management. The mechanism provides real time monitoring and scheduling base on individual channel characteristic. The proposal RFCM improves channel utilization in both of real time and non-real time data distribution. The main advantage of the RFCM is its provision of dynamic adjustment on the bandwidth utilization for different types real time applications. Network Simulations (NS2)[24] is used to validate the supervisor properties of the proposed RFCM. Besides on the theoretical analysis of traffic management, a new systematic and flexibility design methodology in central office communications equipment - Common Communication Platform (CCP) is introduced. It is a generic hardware and software platform on how to design network equipment. By using such model, it reduces the cycle time and reuses the previous knowledge in designing network equipment. Also, a high density DSP array board is designed in this platform. Such board contains 64 DSPs in Compact PCI 6U form factor. It uses data hub (designed by FPGA) to interconnect the board's processor and the DSP farm. By using this board, it can increase the number of voice channel to support in a single networking system. Hence, with this hardware, the proposed RFCM and other algorithm can be implemented for further investigation.
Description: xiii, 172 leaves : ill. ; 30 cm.
PolyU Library Call No.: [THS] LG51 .H577M EIE 2003 Yam
Rights: All rights reserved.
Appears in Collections:Thesis

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