Please use this identifier to cite or link to this item: http://hdl.handle.net/10397/34041
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dc.contributor.authorQin, Zen_US
dc.contributor.authorWang, YIen_US
dc.contributor.authorLiu, DUOen_US
dc.contributor.authorShao, Zen_US
dc.contributor.authorGuan, Yen_US
dc.date.accessioned2015-09-30T09:43:58Z-
dc.date.available2015-09-30T09:43:58Z-
dc.date.issued2011-
dc.identifier.citation2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC), 5-9 June 2011, New York, NY, p. 17-22en_US
dc.identifier.isbn978-1-4503-0636-2-
dc.identifier.issn0738-100x-
dc.identifier.urihttp://hdl.handle.net/10397/34041-
dc.description.abstractThe new write constraints of multi-level cell (MLC) NAND flash memory make most of the existing flash translation layer (FTL) schemes inefficient or inapplicable. In this paper, we solve several fundamental problems in the design of MLC flash translation layer. The objective is to reduce the garbage collection overhead so as to reduce the average system response time. We make the key observation that the valid page copy is the essential garbage collection overhead. Based on this observation, we propose two approaches, namely, concentrated mapping and postponed reclamation, to effective reduce the valid page copies. We conduct experiments on a set of benchmarks from both the real world and synthetic traces. The experimental results show that our scheme can achieve a significant reduction in the average system response time compared with the previous work.en_US
dc.description.sponsorshipDepartment of Computingen
dc.language.isoenen_US
dc.publisherIEEEen_US
dc.relation.ispartof2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC), 5-9 June 2011, New York, NYen_US
dc.subjectAddress mappingen_US
dc.subjectFlash translation layeren_US
dc.subjectGarbage collectionen_US
dc.subjectMLC NAND flash memoryen_US
dc.titleMNFTL : an efficient flash translation layer for MLC NAND flash memory storage systemsen_US
dc.typeConference Paperen_US
dc.description.otherinformationRefereed conference paperen_US
dc.identifier.spage17-
dc.identifier.epage22-
dc.identifier.rosr55615-
item.fulltextFull Text (via PolyU elinks)-
crisitem.author.deptDepartment of Computing-
crisitem.author.facultyFaculty of Engineering-
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