Please use this identifier to cite or link to this item: http://hdl.handle.net/10397/33524
Title: Hardware efficient realisation of number theoretic convolvers
Authors: Siu, WC 
Constantinides, AG
Issue Date: 1986
Publisher: IEEE
Source: ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings, 1986, p. 237-240 How to cite?
Abstract: The authors propose hardware realizations of number-theoretic transforms that are based on the transformation of their fundamental relationships into recursive filter forms with single integer poles. Use is made of read-only memory (ROM) to effect the multiplications by the root of unity. Suitable NTTs are then suggested for the fast computation of cyclic convolutions using multidimensional and multimodular techniques. The required ROM size in the proposed realizations is small and the control of data flow is simple and straightforward. This new class of NTTs can considerably relax the normal sequence length and wordlength constraints for the NTT.
Description: ICASSP 86 - Proceedings, IEEE-IECEJ-ASJ International Conference on Acoustics, Speech, and Signal Processing., Tokyo, Jpn
URI: http://hdl.handle.net/10397/33524
ISSN: 0736-7791
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