Efficient PFC voltage regulator with reduced redundant power processing

Please use this identifier to cite or link to this item: http://hdl.handle.net/10397/32020

Title:	Efficient PFC voltage regulator with reduced redundant power processing
Authors:	Chow, MHL Tse, CK Lee, YS
Issue Date:	1999
Publisher:	IEEE
Source:	PESC Record - IEEE Annual Power Electronics Specialists Conference, 1999, v. 1, p. 87-92 How to cite?
Abstract:	Conventional PFC power supplies employ two cascading stages that deal separately with PFC and voltage regulation. Since power is processed serially by two power stages, the efficiency is limited. In this paper a PFC power supply with improved efficiency is proposed. This circuit makes use of a parallel configuration that reduces unnecessary processing of all power by two stages serially. The circuit is derived from consideration of the power flow between the input, the load and the storage capacitor. A specific circuit implementation is described and the test results are reported.
Description:	Proceedings of the 1999 30th Annual IEEE Power Electronics Specialists Conference (PESC'99), Charleston, SC, USA, 27 June-1 July 1999
URI:	http://hdl.handle.net/10397/32020
ISSN:	0275-9306
Appears in Collections:	Conference Paper

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