Please use this identifier to cite or link to this item: http://hdl.handle.net/10397/32020
Title: Efficient PFC voltage regulator with reduced redundant power processing
Authors: Chow, MHL 
Tse, CK 
Lee, YS
Issue Date: 1999
Source: PESC Record - IEEE Annual Power Electronics Specialists Conference, 1999, v. 1, p. 87-92
Abstract: Conventional PFC power supplies employ two cascading stages that deal separately with PFC and voltage regulation. Since power is processed serially by two power stages, the efficiency is limited. In this paper a PFC power supply with improved efficiency is proposed. This circuit makes use of a parallel configuration that reduces unnecessary processing of all power by two stages serially. The circuit is derived from consideration of the power flow between the input, the load and the storage capacitor. A specific circuit implementation is described and the test results are reported.
Publisher: IEEE
ISSN: 0275-9306
Description: Proceedings of the 1999 30th Annual IEEE Power Electronics Specialists Conference (PESC'99), Charleston, SC, USA, 27 June-1 July 1999
Appears in Collections:Conference Paper

Access
View full-text via PolyU eLinks SFX Query
Show full item record

SCOPUSTM   
Citations

16
Last Week
0
Last month
Citations as of Aug 7, 2020

Page view(s)

134
Last Week
5
Last month
Citations as of Sep 27, 2020

Google ScholarTM

Check


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.