Please use this identifier to cite or link to this item: http://hdl.handle.net/10397/29942
Title: Study of nonlinear dynamics of LDPC decoders
Authors: Zheng, X
Lau, FCM 
Tse, CK 
Wong, SC 
Issue Date: 2005
Source: Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005, v. 2, 1523017, p. 157-160 (CD) How to cite?
Abstract: Low-density-parity-check (LDPC) codes have aroused much research interest because of their excellent bit error performance. The behaviour of the iterative LDPC decoders, however, has not been fully investigated at all signal-to-noise ratios (SNRs). By considering the LDPC decoders as high-dimensional nonlinear dynamical systems, we attempt to study the corresponding phase trajectories at different SNR values. By having an in-depth understanding of the decoder behaviour, engineers should be able to design more effective and efficient decoders.
Description: 2005 European Conference on Circuit Theory and Design, Cork, 28 August-2 September 2005
URI: http://hdl.handle.net/10397/29942
ISBN: 0780390660
9780780390669
DOI: 10.1109/ECCTD.2005.1523017
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