Please use this identifier to cite or link to this item: http://hdl.handle.net/10397/29461
Title: Pipeline design for the realization of the prime factor algorithm using the extended diagonal structure
Authors: Lun, DPK 
Siu, WC 
Issue Date: 1994
Publisher: Institute of Electrical and Electronics Engineers
Source: IEEE transactions on computers, 1994, v. 43, no. 10, p. 1232-1237 How to cite?
Journal: IEEE transactions on computers 
Abstract: In this brief contribution, an efficient pipeline architecture is proposed for the realization of the Prime Factor Algorithm (PFA) for digital signal processing. By using the extended diagonal feature of the Chinese Remainder Theorem (CRT) mapping, we show that the input data sequence can be directly loaded into a multidimensional array for the PFA computation without any permutation. Short length modules are modified such that an in-place and in-order computation is allowed. The computed results can then be directly restored back to the memory array without the need for further reordering. More importantly, the CRT mapping can also be used to represent the output data, hence we can utilize the extended diagonal feature of the CRT mapping to directly send the computed results to the outside world. As compared to the previous approaches, the present approach requires no shifting or rotation during the data loading and retrieval processes. In the case of multidimensional PFA computation, it does not require the computation to be split up into a number of two-dimensional computations. Hence, the overhead required for data loading and retrieval in each two-dimensional stage can be saved.
URI: http://hdl.handle.net/10397/29461
ISSN: 0018-9340
EISSN: 1557-9956
DOI: 10.1109/12.324549
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