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Title: Improving the reliability of embedded systems with cache and SPM
Authors: Wang, M
Wang, YI
Liu, DUO
Shao, Z 
Keywords: Cache storage
Digital storage
Embedded systems
Program compilers
Issue Date: 2009
Publisher: IEEE
Source: IEEE 6th International Conference on Mobile Adhoc and Sensor Systems, 2009 : MASS '09, 12-15 October 2009, Macau, p. 825-830 How to cite?
Abstract: In this paper, we develop a compiler-assisted thermal-aware data allocation algorithm to improve the reliability of embedded systems with cache and SPM (scratch-pad memory). Our basic idea is to distribute the workload evenly between the cache and SPM in order to alleviate the temperature hot spots in the on-chip memory system. In the algorithm, considering the size of SPM, we first divide the loop iterations into two parts, and put the accessed data of the first part into SPM. Then we perform code transformation based on the partitioning of iterations. By alternatively using the data cache and SPM, the peak temperature is reduced. We implement our technique and simulate them using the Trimaran infrastructure with power models for cache and SPM, and the thermal simulator, HotSpot, on a set of benchmarks from DSPstone and MiBench. The experimental results show that our technique can significantly improve the reliability of the on-chip memory system.
ISBN: 978-1-4244-5113-5
DOI: 10.1109/MOBHOC.2009.5336913
Appears in Collections:Conference Paper

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