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|Title:||Design of current-sharing control interface circuits for hot swappable N + X power modules||Authors:||Chen, Yi||Keywords:||Hong Kong Polytechnic University -- Dissertations
Electric circuits, Parallel
|Issue Date:||2006||Publisher:||The Hong Kong Polytechnic University||Abstract:||Distributed power systems, compared with the centralized ones, possess lots of merits in capability, reliability, redundancy, and modularity. They are widely utilized in the cases of high current and high power in order to achieve high efficiency, high availability, low-cost maintenance, and low-cost upgrade. Among the existing configurations of them, the parallel one is the most commonly used. By adopting the parallel configuration, the risky high-current stresses of the systems can be safely shared by several power modules (PMs) of the same low power rating. However, in practice, few PMs can be identical due to manufacture tolerance and aging. When the non-identical PMs are paralleled together, how to even the load-current distribution among them becomes an important issue. In order to achieve a perfect current distribution, an amount of current-sharing (CS) techniques, including the ones about active current programming, have been developed and improved. Up to now, they are directly applied into the PMs. Further for the sake of the system availability, in most cases, between the paralleled PMs and the common load an ORing-MOSFET circuit is inserted. It can offer many protection functions like under voltage protection (UVP) and over voltage protection (OVP) so that the faulty PMs can be detected and isolated from the system. When the CS techniques are directly applied into the ORing-MOSFET circuits, they evolve into the CS control interface circuits. The content of this thesis is about the design of the CS control interface circuits. All the CS control loops are placed in the CS interface circuit. The voltage-regulating control loops in the paralleled PMs and the CS control loops in the CS interface circuit are connected in cascade, which makes it possible to design and optimize these two kinds of the control loops relatively independently. All the CS control interconnections exist inside of the CS interface circuit. No interconnection fault will happen to harm the system reliability. It becomes possible to connect and disconnect the paralleled PMs while the system is hot and operative. Although newly-developing, the CS interface circuits are expected to become popular for the high-availability parallel PM systems. This thesis consists of eight chapters. In Chapter One, the state of the art and the merits of the CS interface circuits are introduced. In Chapter Two, the related contemporary current-sensing, current-programming and current control techniques are reviewed and estimated. The CS techniques include the minimum-as-master current-programming method that we propose specially for the CS interface circuits. The research work that we have done for the past three years is presented in Chapters Three to Six. In Chapter Three, a basic structure is introduced for the CS interface circuits. In Chapter Four, eight kinds of the CS controllers developed from the techniques mentioned in Chapter Two are introduced. Four of them are implemented. The contents of Chapter Five are the simplification of the hysteretic CS controllers mentioned in Chapter Four and the introduction of a light load protection (LLP) into the CS interface circuits. The content of Chapter Six is the implementation of a "parasitic" hot-swap function of the CS control interface circuits. Just by redesigning the original UVP, CS, and LLP function circuits, the hot-swap function is implemented without any hot-swap controller added. Finally, the discussion and the conclusion are presented in Chapters Seven and Eight respectively.||Description:||xxviii, 205 leaves : ill. ; 30 cm.
PolyU Library Call No.: [THS] LG51 .H577P EIE 2006 Chen
|URI:||http://hdl.handle.net/10397/2660||Rights:||All rights reserved.|
|Appears in Collections:||Thesis|
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