Please use this identifier to cite or link to this item: http://hdl.handle.net/10397/24344
DC FieldValueLanguage
dc.contributorDepartment of Computing-
dc.creatorZhuge, Q-
dc.creatorShao, Z-
dc.creatorXiao, B-
dc.creatorSha, E-
dc.date.accessioned2015-09-30T09:42:49Z-
dc.date.available2015-09-30T09:42:49Z-
dc.identifier.isbn1-58113-742-7-
dc.identifier.urihttp://hdl.handle.net/10397/24344-
dc.language.isoenen_US
dc.publisherIEEEen_US
dc.subjectDigital signal processing chipsen_US
dc.subjectIntegrated circuit designen_US
dc.subjectMinimisationen_US
dc.subjectTimingen_US
dc.titleDesign space minimization with timing and code size optimization for embedded DSPen_US
dc.typeConference Paperen_US
dc.identifier.spage144-
dc.identifier.epage149-
dc.identifier.doi10.1109/CODESS.2003.1275274-
dcterms.abstractOne of the most challenging problems in high-level synthesis is how to quickly explore a wide range of design options to achieve high-quality designs. This paper presents an Integrated Framework for Design Optimization and Space Minimization (IDOM) towards finding the minimum configuration satisfying timing and code size constraints. We show an effective way to reduce the design space to be explored through the study of the fundamental properties and relations among multiple design parameters, such as retiming value, unfolding factor, timing, and code size. Theories are presented to produce a small set of feasible design choices with provable quality. IDOM algorithm is proposed to generate high-quality design by integrating performance and code size optimization techniques. The experimental results on a set of DSP benchmarks show the efficiency and effectiveness of the IDOM algorithm. It constantly generates the minimal configuration for all the benchmarks. The cost of design space exploration using IDOM is only 3% of that using the standard method.-
dcterms.bibliographicCitationFirst IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2003, 1-3 October 2003, Newport Beach, CA, USA, p. 144-149-
dcterms.issued2003-
dc.relation.ispartofbookFirst IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2003, 1-3 October 2003, Newport Beach, CA, USA-
dc.relation.conferenceIEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis [CODES+ISSS]-
dc.identifier.rosgroupidr17003-
dc.description.ros2003-2004 > Academic research: refereed > Refereed conference paper-
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