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Title: Parallel decoding of LDPC convolutional codes using OpenMP and GPU
Authors: Chan, CH
Lau, FCM 
Keywords: CPU
LDPC code
LDPC convolutional code
Error performance
Issue Date: 2012
Publisher: IEEE
Source: 2012 IEEE Symposium on Computers and Communications (ISCC), 1-4 July 2012, Cappadocia, p. 000225-000227 How to cite?
Abstract: Recently, there have been different applications, namely 10GBase-T Ethernet, video broadcasting and satellite communication, utilizing low-density parity-check (LDPC) codes as the forward-error-correction codes. The main reason is that the error performance of LDPC codes can be very close to the Shannon limit. LDPC codes can be further categorized into LDPC block codes (LDPC-BCs) and LDPC convolutional codes (LDPC-CCs). It has also been discovered that LDPC-CCs usually outperform LDPC-BCs. Simulation of LDPC-BCs and LDPC-CCs can take a lot of time because the decoding algorithms are relatively complex. Fortunately, the decoding steps can be performed in parallel. In this paper, we create three different platforms for simulating the error performance of LDPC-CCs. The first two platforms are run on a Central Processing Unit (CPU) while the third one involves the use of a Graphics Processing Unit (GPU). We show that using GPU can improve the simulation speed substantially.
ISBN: 978-1-4673-2712-1
978-1-4673-2711-4 (E-ISBN)
ISSN: 1530-1346
DOI: 10.1109/ISCC.2012.6249298
Appears in Collections:Conference Paper

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