Please use this identifier to cite or link to this item: http://hdl.handle.net/10397/22650
Title: Time sharing of Runtime Coarse-Grain Reconfigurable Architectures processing elements in multi-process systems
Authors: Schafer, BC
Issue Date: 2014
Publisher: Institute of Electrical and Electronics Engineers Inc.
Source: Proceedings of the 2014 International Conference on Field-Programmable Technology, FPT 2014, 2014, 7082757, p. 76-82 How to cite?
Abstract: This paper presents a method to time share the Processing Elements (PEs) of Runtime Coarse Grain Reconfigurable Architectures (CGRA) among multiple processes being executed concurrently onto the same CGRA. Runtime CGRA architectures time-multiplex the data path, creating a set of contexts for each state. These contexts configure the PEs and the routing resources of the CGRA and are typically loaded every clock cycle. The target architecture in this work is a commercial CGRA IP which is embedded as an IP into complex SoCs. Our proposed method analyzes the PE utilization in each context for multi-process systems running concurrently onto the same CGRA and time shares unused PEs assigned to one process with the other processes running in parallel. Our method reduces the total PE usage and hence the size of the CGRA IP and therefore the cost of the SoC. Results show that our method is extremely efficient and can reduce the PE utilization by up to 20% and on average by 14% and is only 2% worse than the optimal solution, while being much faster.
Description: 13th International Conference on Field-Programmable Technology, FPT 2014, 10-12 December 2014
URI: http://hdl.handle.net/10397/22650
ISBN: 9.78E+12
DOI: 10.1109/FPT.2014.7082757
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