Please use this identifier to cite or link to this item: http://hdl.handle.net/10397/17245
Title: Extended diagonal structure for address generation of the prime factor algorithm
Authors: Lun, DPK 
Siu, WC 
Issue Date: 1991
Source: IEE proceedings. G, Circuits, devices and systems, 1991, v. 138, no. 4, p. 449-456 How to cite?
Journal: IEE proceedings. G, Circuits, devices and systems 
Abstract: In the paper, an extended diagonal structure is used efficiently for the address generation of the prime factor algorithm (PFA). This approach is in-place, in-order and requires less temporary storage during the computation. It requires very few modulo operations and no modulo inverse for its computation; these inverses often take up a large memory space for storage in other address generation algorithms. This approach has been implemented using Fortran 77 and the assembly language of the 320C25 DSP. It shows that a maximum of 86% saving in address generation time can be achieved when compared to the conventional approach.
URI: http://hdl.handle.net/10397/17245
ISSN: 0956-3768
Appears in Collections:Journal/Magazine Article

Access
View full-text via PolyU eLinks SFX Query
Show full item record

SCOPUSTM   
Citations

2
Citations as of Oct 18, 2017

Page view(s)

38
Last Week
0
Last month
Checked on Oct 15, 2017

Google ScholarTM

Check



Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.