Please use this identifier to cite or link to this item: http://hdl.handle.net/10397/14415
Title: A new 3-phase design exploration methodology for video processor design
Authors: Lo, WY
Lun, DPK 
Siu, WC 
Issue Date: 2012
Source: ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems, 2012, 6271487, p. 1331-1334 How to cite?
Abstract: When making video processor design, conventional design exploration methodologies take extremely long time in parameter optimization but the final design may not necessarily meet the application requirements since the architecture cannot deviate too much from the initial design. To speed up the design process, statistical performance models were used to guide the simulation; however their accuracy is questionable. In this paper, a new 3-phase design exploration methodology for video processor is proposed. It makes use of an almost cycle-accurate performance model to provide information for refining the processor architecture. It can derive the optimal architecture in a much shorter period of time than the conventional methods. We successfully implemented a few video coding/decoding applications on the video processor derived from the proposed methodology. Simulation results show that it outperforms other video processors in both cost and performance perspectives.
Description: 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, 20-23 May 2012
URI: http://hdl.handle.net/10397/14415
DOI: 10.1109/ISCAS.2012.6271487
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