Please use this identifier to cite or link to this item:
Title: A development of 6kV three-level NPC inverters with novel DC-link circuit and optimal dead-time configuration
Authors: Liu, J
Qing, SH
Wen, XL
Li, ZC
Hu, WB
Liu, J
Chung, CY 
Keywords: DC-Link
Dead-time configuration
Over current
Three-level NPC inverter
Issue Date: 2012
Publisher: IEEE
Source: 2012 IEEE International Symposium on Industrial Electronics (ISIE), 28-31 May 2012, Hangzhou, p. 1957-1961 How to cite?
Abstract: Because of the existence of reverse recovery time of the clamp diode and di/dt-chokes diode of three-level natural point camped (NPC) inverter, the partial over current phenomena will occur at the capacitive load or inductive load condition. This problem limits the energy densities of the system and do harm to the power switch devices. To avoid this over current problem, a novel circuit of three-level NPC inverter is presented. The partial over current problem of traditional three-level NPC inverter can be solved by using this new circuit. At the same time, the optimal dead-time configuration of PWM control technology is presented. In this paper, the system parameter selection and test circuit of the new inverters are analyzed in detail. After using those methods, the security and stability of system operating have been enhanced obviously. At last, some experimental results have been presented and discussed.
ISBN: 978-1-4673-0159-6
978-1-4673-0157-2 (E-ISBN)
ISSN: 2163-5137
DOI: 10.1109/ISIE.2012.6237392
Appears in Collections:Conference Paper

View full-text via PolyU eLinks SFX Query
Show full item record

Page view(s)

Last Week
Last month
Citations as of Dec 17, 2018

Google ScholarTM



Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.