Please use this identifier to cite or link to this item: http://hdl.handle.net/10397/12146
Title: Optimizing nested loops with iterational and instructional retiming
Authors: Xue, C
Shao, Z 
Liu, M
Qiu, MK
Sha, EHM
Issue Date: 2005
Publisher: Springer
Source: Lecture notes in computer science (including subseries Lecture notes in artificial intelligence and lecture notes in bioinformatics), 2005, v. 3824 lncs, p. 164-173 How to cite?
Journal: Lecture notes in computer science (including subseries Lecture notes in artificial intelligence and lecture notes in bioinformatics) 
Abstract: Embedded systems have strict timing and code size requirements. Retiming is one of the most important optimization techniques to improve the execution time of loops by increasing the parallelism among successive loop iterations. Traditionally, retiming, has been applied at instruction level to reduce cycle period for single loops. While multi-dimensional (MD) retiming can explore the outer loop parallelism, it introduces large overheads in loop index generation and code size due to loop transformation. In this paper, we propose a novel approach, that combines iterational retiming with instructional retiming to satisfy any given timing constraint by achieving full parallelism for iterations in a partition with minimal code size. The experimental results show that combining iterational retiming and instructional retiming, we can achieve 37% code size reduction comparing to applying iteration retiming alone.
Description: International Conference on Embedded and Ubiquitous Computing, EUC 2005, Nagasaki, 6-9 December 2005
URI: http://hdl.handle.net/10397/12146
ISBN: 3540308075
9783540308072
ISSN: 0302-9743
EISSN: 1611-3349
DOI: 10.1007/11596356_19
Appears in Collections:Conference Paper

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